Semiconductor devices typically undergo a variety of stress test procedures, including short-circuit tests, burn-in tests, and device functional tests to insure their proper operation. During such stress testing, it is important that the temperature of the semiconductor device under test, which is commonly called DUT, be held at a substantially constant value.
An integrated circuit (IC) tester, which applies a test signal of a predetermined pattern and measures the electrical characteristics of the DUT, is typically operated at various temperatures in order to perform such stress testing procedures. Many IC testers use a IC test assembly, such as for example, a lead pusher and insert, to bring the DUTs into electrical contact with a tester head in a test section of the IC tester. However, the temperature within the test section is normally unstable, and varies within some tolerance as graphically depicted by FIG. 1, for an illustrated desired set point temperature of 90° C.
As illustrated, typically a heater provided in the test section of the IC tester, will heat until the desired set point temperature is reached, wherein a thermostat after sensing this temperature will turn the heater off. However, the latent heat of the heater typically causes a spike in the temperature, overshooting the desired set point temperature. Likewise, when the temperature within the test section falls below the set point temperature, the delay in the thermostat to turn on the heater and the delay to heat the heater, causes the temperature within the test section to dip below the set point temperature. As a result of this heater-thermostat action or heating-cooling cycle, IC device performance may be less than optimal and inaccurate.
Additionally, it is known that the DUTs self-heat, and that the resulting rise in temperature may cause the performance of some of the DUTs to degrade. This may cause further under-reporting of the performance of the DUTs. Various temperature forcing techniques have been used in an attempt to maintain the temperature of the DUT around a constant set-point. However, with many current semiconductor devices, instantaneous power fluctuations may be so severe and dramatic, that current temperature forcing systems often fail to accurately offset the effects of self-heating.
Furthermore, the lack of a suitable heat sink contacting each DUT in the IC tester has resulted in localized temperature variations at each DUT. These localized temperature variations or hot spots has caused the device temperature of some DUTs to rise beyond their test tolerance.
Prior art improvements to the heat transfer between the DUT body and the heat sink include using an interface material, such as thermal greases and interface pad materials. However, almost all thermal greases and interface pad materials do not offer a means to repeatedly remove a heat sink connected to sequentially tested devices without contaminating the DUT package or damaging the interface material. The tackiness of a pad tends to tear it when the heat sink separates from the DUT. Furthermore, heat-sink clamping forces are typically limited to a couple of pounds per device such not to damage the DUT. This inability to apply a large clamping force gives little advantage to using such pads.
Accordingly, there remains a recognized need in the art to provide an IC tester which minimizes temperature variation at each DUT and which offers a means to repeatedly remove a heat sink connected to sequentially tested device without contaminating the DUT package or damaging the interface material.